Altera

常見例句

• Do not altera syllable of this message.
  對(duì)這則消息一點(diǎn)也不要更改。
• It presents ep1c6q240 of Altera as an example to illuminate the flow of BST.
  以Altera的ep1c6q240器件為例,介紹了整個(gè)邊界掃描測(cè)試過程。
• Waveforms showing correct functionality of the design. Altera may ask for more details on the design if required.
  編譯報(bào)告檔案與模擬波形必須能顯示出正確的設(shè)計(jì)功能,如果需要的話
• The Nios embedded processor is a softcore 16/32 bits RISC CPU optimized for Altera programmable logic devices.
  SoPC(Svsetm on Programmable Chip)是基于可編程邏輯的片上系統(tǒng),Nios處理器是一個(gè)基于FPGA的16/32位的軟核RISC處理器。
• We verify the validity of asynchronous to synchronous interface and mixed-clock FIFO interface by using Altera Quartus.
  中文摘要這篇論文中我們?cè)O(shè)計(jì)了一個(gè)非同步到同步電路的介面和兩個(gè)混合時(shí)脈的FIFO用于即時(shí)性的同步電路應(yīng)用。
• The whole design is simulated in function and timing on QUARTUS II EDA tool-desk of ALTERA Corp.
  整個(gè)設(shè)計(jì)及其各個(gè)子模塊都在ALTERA公司的EDA工具QUARTUSII平臺(tái)上進(jìn)行了邏輯綜合及功能和時(shí)序仿真。
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