deskew

基本解釋

Enhanced image transformation like Stretching,Flip,Mirror,Rotate,Deskew for Multiple Images .
增強圖像變換一樣伸展，翻轉，鏡像，旋轉， deskew為多張圖片。
A deskew circuit and a rate matching circuit which utilize the FIFO module, and a deskew method are also disclosed.
本發(fā)明還公開了利用所述FIFO模塊的延遲均衡電路和速率匹配電路，以及延遲均衡方法。
The Viterbi algorithm and deskew algorithm are implemented using Verilog hardware description language.
本論文硬件實現(xiàn)了適用于1000BASE-T收發(fā)器的Viterbi譯碼器和數(shù)據(jù)對齊模塊。
Delay-Locked Loops (DLLs) have been widely used for clock deskew in stead of Phase-Locked Loop (PLLs) because of easy design and inherent stable.
隨著科技的日新月異造成的進步，電子產(chǎn)品的功能也越來越強大。
Chorng-Sii Hwang and Wen-Wei Chiu, “Internal offset-canceled phase locked loop-based deskew buffer”, US Patent No.6346838, from Feb. 12th, 2002 to Jan. 5th 2021.
黃崇禧,邱文偉“以鎖相迴路為基礎之去偏差緩沖電路及其產(chǎn)生方法”,臺灣專利，專利字號541800,自2003年7月11日起至2021年11月28日止。